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2. Basic VHDL Concepts

This chapter is intended to give a short introduction to the VHDL by presenting the basic concepts. Describing simple VHDL models should be possible after covering this material. Therefore, the chapter starts with an overview of the different components of VHDL models followed by a more detailed description in separate sections. Finally, the concepts of the VHDL library, analysis and simulation are presented.

The less exciting material on things like predefined types, allowed object identifiers and available operators for expressions, all of which are very similar to other programming languages like C or Pascal, is left out of this introductory chapter. This information, which has to be considered even in simple models, can be found in chapters 3, 4 and 5.



 

Richard Geissler
1998-10-07